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Notes for chip search:
  • Use "+" as delimeter for all fields (except "cart name", where space is used); if many values are entered, all of them must appear in the cartridge then; case is not sensitive
  • "Mapper" is the actual mapper used by this cartridge hardware (might not match the one at wiki.nesdev.com, as at the moment I was analyzing this cartridge, there was no mapper assigned to it, so I had to assign my own number for testing)
  • "Original mapper" is the mapper used by licensed version of this game (for multicarts, it refers to mapper of the inside games, so 0+2 means this cartridge can run NROM+UNROM games)
  • Order in which you put values doesn't matter (you can write 7400+74138+7400 or 7400+7400+74138 to search for a cartridge that contains at least two 7400 chips and one 74138
  • Some chips (like PAL16*8) appear in cartridges as 16V8 or 16L8, so be sure to check both posibilities
  • Same goes for memories - type 27F080 to search for 32 pin memories, 27512 for 28 pin with two chip enables or MASKROM_1M_DIP28 for 28 pin with one chip enable
  • Same goes for mappers - some examples: AX5904(MMC1), AX5202P(MMC3), PT8154BM (9112MMC3), AX5208C(VRC4), 23C3662(VRC2)
  • Good news is that you can use wildcards, so 74139+*MMC3* will search for any cartrige that has at least one 74139 and MMC3 chip in any version
Mapper#
Original mapper#
PCB marks
Tags
Chips
Dragon Ball Z 2
Typesingle
Mapper
Original mapper16
PCB marksD-18-B 232048
Tags:
Uploaded:2018-01-18 12:51:32

Elements:
NameValue
IC116L8
IC293C46(DIL8)
IC374191
IC474191
IC574191
IC674191
IC7AX5705(23C3662(VRC2))
IC827F080
IC927F080
C1-
CART1FAMICOM_CART
D1DIODE
R12.2k
R22.2k
R310k

Chip signature:
16L8+93C46(DIL8)+74191+74191+74191+74191+AX5705(23C3662(VRC2))+27F080+27F080

PCB top:

PCB bottom:

Shell top:


Shell bottom:

Screenshoots:
No photo
Extra info:
Game: Dragon Ball Z 2 (ported from Bandai 24C02)
One of the very few games that uses VRC2+DIP8 EPROM. AX5705 is VRC2 (this chip can also be seen under name 23C269 which also has functional EPROM lines)
Due to different time of changing ROMSEL/M2, they added circuit for delaying rising edge of M2.

PAL has 3 latches so research is in progress.



nLOADL = (!M2_DELAY) | (!CPU_A11) | (!CPU_A12) | (!CPU_A13) | (!CPU_A14) | (CPU_nROMSEL) | (CPU_RnW) | (CPU_A10);
nLOADH = (!M2_DELAY) | (!CPU_A10) | (!CPU_A11) | (!CPU_A12) | (!CPU_A13) | (!CPU_A14) | (CPU_nROMSEL) | (CPU_RnW);

nIRQ <= 
 '0' when (!CPU_D1 & !nIRQPEN & !CPU_D0 & !CPU_nROMSEL & !CPU_RnW & CPU_A14 & CPU_A13& !CPU_A12 & CPU_A11 & CPU_A10 & !M2_DELAY) |
          (!CPU_D1 & !CPU_RnW & CPU_A14 & CPU_A13 & CPU_A12 & !CPU_A11 & CPU_A10 & M2_DELAY) |
          (!CPU_D1 & !nIRQPEN & !CPU_nROMSEL & !CPU_RnW & CPU_A14 & CPU_A13 & CPU_A12 & !CPU_A11 & CPU_A10) else
 '1' when (!CPU_D1 & !CPU_nROMSEL & !CPU_RnW & CPU_A14 & CPU_A13 & CPU_A12 & !CPU_A11 & !CPU_A10);
 
CIRAM_A10 <= 
 '0' when (!CPU_D1 & !nIRQPEN & !CPU_D0 & !CPU_nROMSEL & !CPU_RnW & !CPU_A14 & !CPU_A13 & CPU_A12 & !CPU_A11 & !CPU_A10) |
          (!CPU_D1 & !CPU_nROMSEL & !CPU_RnW & !CPU_A14 & !CPU_A13 & CPU_A12 & M2_DELAY) else
 '1' when ;


O4 = Probably non-combinatorial

nCOUNTEN <= 
 '0' when (!CPU_D1 & !CPU_nROMSEL & !CPU_RnW & CPU_A14 & CPU_A13 & CPU_A12 & !CPU_A11 & CPU_A10) else
 '1' when (!CPU_D1 & !CPU_nROMSEL & !CPU_RnW & CPU_A14 & CPU_A13 & CPU_A12 & !CPU_A11 & !CPU_A10);
	 

CLK = (!nIRQPEN) | (nCOUNTEN) | (M2_DELAY);



	
	
   loadl 1111100000000000 f800
   loadh 1111110000000000 fc00
!counten 1111010000000000

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