O6 <= D0 when CPU-!ROMSEL=0 and R/!W=0 and A14=0 and A3=0 and A2=1;
O5 <= D1 when CPU-!ROMSEL=0 and R/!W=0 and A14=0 and A3=0 and A2=1;
02 <= 0 when CPU-!ROMSEL=0 and R/!W=0 and A14=1 and A3=1 and A2=1 else
1 when CPU-!ROMSEL=0 and R/!W=0 and A14=1 and A3=1 and A2=0;
!IRQ! <= 1 when CPU-!ROMSEL=0 and R/!W=0 and A14=1 and A3=0 and A2=1 else
1 when CPU-!ROMSEL=0 and R/!W=0 and A14=1 and A3=1 and A2=1 else
0 when (CPU-!ROMSEL!=1 or R/!W=1) and IRQ_PEN = 1 else
0 when CPU-!ROMSEL=0 and R/!W=0 and A14=0 and A3=1 and A2=1
CLR <= not O2 or IRQ_PEN
CIRAM <= 0 when O6=0 and O5=1 else
1 when 06=1 and 05=1 else
VRC-CIRAM
a a a dddd dddd
1 3 2 7654 3210
4
-----------------
$8004 0 0 1 [.... ..mm] mm - mirroring (source of ciram) (0/1: VRC-CIRAM, 2:GND, 3: VCC)
$800c 0 1 1 [.... ....] writing any value forces interrupt to be triggered
$c004 1 0 1 [.... ....] writing any value acknowledges pending interrupt
$c008 1 1 0 [.... ....] writing any value resets counter from clear
$c00c 1 1 1 [.... ....] writing any value holds counter in clear & acknowledges pending interrupt
* counter is automatically cleared when interrupt becomes pending
* interrupt is triggered when IRQ_PEN=1 and (CPU-!ROMSEL! = 1 or R/!W=1)
