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Notes for chip search:
  • Use "+" as delimeter for all fields (except "cart name", where space is used); if many values are entered, all of them must appear in the cartridge then; case is not sensitive
  • "Mapper" is the actual mapper used by this cartridge hardware (might not match the one at wiki.nesdev.com, as at the moment I was analyzing this cartridge, there was no mapper assigned to it, so I had to assign my own number for testing)
  • "Original mapper" is the mapper used by licensed version of this game (for multicarts, it refers to mapper of the inside games, so 0+2 means this cartridge can run NROM+UNROM games)
  • Order in which you put values doesn't matter (you can write 7400+74138+7400 or 7400+7400+74138 to search for a cartridge that contains at least two 7400 chips and one 74138
  • Some chips (like PAL16*8) appear in cartridges as 16V8 or 16L8, so be sure to check both posibilities
  • Same goes for memories - type 27F080 to search for 32 pin memories, 27512 for 28 pin with two chip enables or MASKROM_1M_DIP28 for 28 pin with one chip enable
  • Same goes for mappers - some examples: AX5904(MMC1), AX5202P(MMC3), PT8154BM (9112MMC3), AX5208C(VRC4), 23C3662(VRC2)
  • Good news is that you can use wildcards, so 74139+*MMC3* will search for any cartrige that has at least one 74139 and MMC3 chip in any version
Mapper#
Original mapper#
PCB marks
Tags
Chips
6 in 1
Typemulti
Mapper267
Original mapper3+4
PCB marks830555C T-109
Tags:
Uploaded:2016-08-24 09:33:57

Elements:
NameValue
IC127F080
IC227F080
IC374157
IC474161
IC574157
IC6AX5202P
C1100n
C2100n
C3100n
C4100n
C5100n
C61n
CART1FAMICOM_CART
D11N4148
D21N4148
R12.2K
R21K

Chip signature:
27F080+27F080+74157+74161+74157+AX5202P

PCB top:

PCB bottom:

Shell top:
No photo

Shell bottom:
No photo
Screenshoots:

Extra info:
[[File:6-in-1 MMC3+CNROM menu.png|thumb]]
[[File:6-in-1 MMC3+CNROM components.jpg|thumb|Note that PRG mask-rom (marked as: EK-606A) was desoldered]]
[[File:6-in-1 MMC3+CNROM top.jpg|thumb]]
[[File:6-in-1 MMC3+CNROM bottom.jpg|thumb]]
[[File:6-in-1 MMC3+CNROM schematics.png|thumb]]


This multicart cartridge consists of AX5202 (pirate MMC3 chip) and other discrete chips. It allows running MMC3, CNROM or NROM games. CNROM games have to be patched so that they change 8kB CHR-ROM banks not by writing to $8000-$ffff, but by using MMC3 registers.  If pattern tables of CNROM game is not modified, current CHR bank configuration have to be set using MMC3 registers to map into 8kB of linear CHR-ROM (to mimic CNROM) before starting CNROM game.

This particular cartridge consists of the following games:

 TITLE                                            | MAPPER |  PRG  |  CHR
 -------------------------------------------------+--------+-------+-------
 1. Teenage Mutant Ninja Turtles 3                | MMC3   | 256 K | 256 K 
 2. Darkwing Duck                                 | MMC3   | 128 K | 128 K 
 3. Transformers - Comvoy no Nazo (J)             | CNROM  |  32 K |  32 K 
 4. ASO - Armored Scrum Object (J)                | CNROM  |  32 K |  32 K 
 5. Tiger-Heli (U)                                | CNROM  |  32 K |  32 K 
 6. Karate Kid, The (U)                           | CNROM  |  32 K |  32 K 

Menu is encoded into game 1 and games 2-6 are also slightly modified.

=Registers=
All registers are same like in MMC3. There is no SRAM at $6000-$7fff but instead - one additional register mapped at $6000-$7fff. Writes to it can be protected in the same way as MMC3 protects SRAM (using $a001), because MMC3's pins controlling SRAM (!OE/!WE) are connected directly to this register control pins.

 D~[.... BbmM] $6000-$7fff
         ||||
         |||+- MMC3 mode (0: on - PRG-ROM A17 & CHR-ROM A17 are controlled by MMC3, 1:off, PRG-ROM A17 = CHR-ROM A17 = b)
         ||+-- MMC3 mode (0: on, 1: off), see notes below 
         |+--- selects 128K PRG-ROM & 128K CHR-ROM block when M=1 (A17 of PRG-ROM & CHR-ROM)
         +---- selects 256K PRG-ROM & 256K CHR-ROM block (A18 of PRG-ROM & CHR-ROM)
		
===bit `m`===
This bit controls what is connected to PRG-ROM A14 and MMC3's A14

m = 0: PRG-ROM A14 is MMC's PRG A14 and MMC3's A14 is CPU-A14
This results in four 8kB CPU banks ($8000-$9FFF/$A000-$BFFF/$C000-$DFFF/$C000-$DFFF) with behaviour just as normal MMC3

m = 1: PRG-ROM A14 is CPU-A14 and MMC3's A14 is GND
When MMC3's A14 is GND, when CPU reads $8000-$bfff or $c000-$ffff, MMC3 thinks it reads $8000-$bfff in both cases, so it uses:
* bank PPPPP selected for $8000-$9fff for both $8000-$9fff and $c000-$dfff,
* bank QQQQQ selected for $a000-$bfff for both $a000-$bfff and $e000-$ffff.
Additionally, PRG-ROM A14 is wired to CPU-A14, so mapping looks like:
             A17 A16 A15 A14 A13
 $8000-$9fff   P   P   P   0   P
 $a000-$bfff   Q   Q   Q   0   Q
 $c000-$dfff   P   P   P   1   P
 $e000-$ffff   Q   Q   Q   1   Q

If: PPPPP is set to even number and QQQQQ = PPPPP + 1 and PRG ROM bank mode bit in MMC3 is set to 1 so that $9000-$9fff is swappable, then it results in one linear 32 kB bank at $8000-$ffff.

Resistor R2 and diode D2 forces bit `m` to be set to 0 for writes at $8000-$bfff so that MMC3 can decode properly register writes, no matter if `m` is 0 or 1.

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