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Cart name
Notes for chip search:
  • Use "+" as delimeter for all fields (except "cart name", where space is used); if many values are entered, all of them must appear in the cartridge then; case is not sensitive
  • "Mapper" is the actual mapper used by this cartridge hardware (might not match the one at wiki.nesdev.com, as at the moment I was analyzing this cartridge, there was no mapper assigned to it, so I had to assign my own number for testing)
  • "Original mapper" is the mapper used by licensed version of this game (for multicarts, it refers to mapper of the inside games, so 0+2 means this cartridge can run NROM+UNROM games)
  • Order in which you put values doesn't matter (you can write 7400+74138+7400 or 7400+7400+74138 to search for a cartridge that contains at least two 7400 chips and one 74138
  • Some chips (like PAL16*8) appear in cartridges as 16V8 or 16L8, so be sure to check both posibilities
  • Same goes for memories - type 27F080 to search for 32 pin memories, 27512 for 28 pin with two chip enables or MASKROM_1M_DIP28 for 28 pin with one chip enable
  • Same goes for mappers - some examples: AX5904(MMC1), AX5202P(MMC3), PT8154BM (9112MMC3), AX5208C(VRC4), 23C3662(VRC2)
  • Good news is that you can use wildcards, so 74139+*MMC3* will search for any cartrige that has at least one 74139 and MMC3 chip in any version
Mapper#
Original mapper#
PCB marks
Tags
Chips
Street Fighter IV (v2 6116 + PAL16L8)
Typesingle
Mapper208
Original mapper
PCB marksNONE
Tags:#stret fighter iv #more info needed
Uploaded:2022-08-17 12:18:31

Elements:
NameValue
IC127F080
IC2AX5202P(MMC3)
IC36116L24
IC4MASKROM_1M_DIP28
IC516L8
C1-
C2-
C3-
CART1FAMICOM_CART

Chip signature:
27F080+AX5202P(MMC3)+6116L24+MASKROM_1M_DIP28+16L8

PCB top:

PCB bottom:

Shell top:


Shell bottom:

Screenshoots:
No photo
Extra info:
SF4 6116+16L8 photo was taken from the auction, but unfortunatelly the seller did not send me the bottom side photo, which would make things much easier. From what I can say that MMC3 epoxy blob for sure omits PRG & CIR-A10 lines, which must be then controlled by PAL.
I initially thought this RAM was used as a 4 byte register for the copy protection mechanism, but that would require some kind of switching between RAM data, CPU data lines lines and PAL and for sure, PAL has not enough pins for that.

So my guess is that this RAM is enabled either for $6000-$7fff or $4800-$5fff and it is initialized by some kind of routine and then when original code jumps to $5000-$5004, RAM is enabled for that region.
PAL has enough lines for do all the job:

[code]
           .---v---.
CPU A11 -> |01   20| -- +5V
CPU A12 -> |02   19| -> PRG A15
CPU A13 -> |03   18| -> PRG A16
           |04   17| -> WRAM /CE
CPU R/W -> |05   16| <- M2
CPU A14 -> |06   15| -> CPU /ROMSEL
CPU D0  -> |07   14| -> (internal feedback loop for $4800.5)
CPU D5  -> |08   13| <- PPU A11
CPU D4  -> |09   12| -> CIR A10
    GND -- |10   11| <- PPU A10
           '-------'
     PAL16L8 (**wild guess**)
[/code]

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