https://forums.nesdev.org/viewtopic.php?t=24461
DIL40 chip is VRC2 so all that logic is to add missing interrupt functionality and H/V/1scA/1scB mirroring.
IRQ counter register is latched during one write, not split into two 4bit nibbles. Also the mirroring reeg seems to be placed somewhere at $f000-$ffff, so the ROM must be a little modified in comparison to the original.
[url=https://obrazki.elektroda.pl/9554747500_1676832493.png][img]https://obrazki.elektroda.pl/9554747500_1676832493_thumb.jpg[/img][/url] [attachment=0]pcb-top-tracks.jpg[/attachment]
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